CdS Thin Film Transistor Threshold Voltage Shift Investigation
A threshold voltage shift of CdS Thin Film Transistor is studied using the COMSOL Multiphysics® software's Semiconductor Module. Drift-diffusion (DD) simulation model is used in which the basic equations used are similar to those used for a single-crystal device except that traps and defects are included in the model. It is assumed that traps due to grain boundaries are uniformly distributed throughout the film. Both exponential and Gaussian trap distributions are introduced in the simulation. The threshold voltage shift was accounted for by bulk traps in the CdS active material and interface traps and charges at the interface between the CdS channel and HfO2 insulator interface. The quantity of the traps and interface charges are determined by matching the simulation I-V curves with experiment.